Router
L1 Cache
Time
Machine
Machine
L1 Cache
L1 Cache
Router
L1 Cache
L1 Cache
L1 Cache
Smart
Memory
Controller
Memory
Controller
Router
L1 Cache
L1 Cache
L1 Cache
I/O Interfaces
eg. PCI Express
eg. PCI Express
Router
L1 Cache
L1 Cache
L1 Cache
Smart
Memory
Controller
Memory
Controller
Traditional multi-core processors rely on a system bus or a large crossbar switch to connect all the processor cores. The problem with this approach is that the bus or switch becomes very complex, and can become the performance bottleneck. These types of solutions may support a small number of cores, but do not scale well to support much higher numbers of processing elements.
Boston Circuits has developed a unique Grid on Chip architecture for the gCORE processors. As its name implies, all of the on-chip resources including the Time Machine, processor cores, memories, and I/O are interconnected by a grid type network. This approach allows for very high bandwidth communications inside the chip, eliminates the interconnect as a bottleneck, and provides excellent scalability up to hundreds of cores.
The Grid on Chip is very flexible, and can accommodate just about any type of processor
core, custom hardware modules, or I/O intellectual property. This provides Boston Circuits with the foundation to provide a broad array of gCORE processors configured for particular markets in a time and cost efficient manner.
Boston Circuits has developed a unique Grid on Chip architecture for the gCORE processors. As its name implies, all of the on-
The Grid on Chip is very flexible, and can accommodate just about any type of processor
core, custom hardware modules, or I/O intellectual property. This provides Boston Circuits with the foundation to provide a broad array of gCORE processors configured for particular markets in a time and cost efficient manner.
